ELS – An Eden Based Digital Logic Simulator

This paper will explore the possibilities and problems associated with modelling digital logic circuits in a definitive language. This will be achieved by attempting to model a digital circuit (the logic, its visual representation and an editor) using a definitive notation. It is hoped that wires in a circuit can be modelled as dependencies in Eden the output from the wire (and therefore input to the next component) is the output of the previous component. The methods used by the model (and possibly the efficiency of a dependency based simulation) will then be compared and contrasted with the methods used in the Java based OLS solution. Weighting : 40% Paper, 60% Model